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Solutions Search - Sample and Hold

LTspice: Worst-Case Circuit Analysis with Minimal Simulations Runs

Joseph Spencer - Field Applications Engineer
Gabino Alonso - Strategic Marketing Engineer
Jun 8th 2017
When designing a circuit in LTspice, you may wish to assess the impact of component tolerances. For example, the gain error introduced by non-ideal resistors in an op amp circuit. This article illustrates a method that reduces the number of simulations needed, and as a result speeds your time to results. Varying a Parameter LTSpice ...

Blog Post LTspice 


LTC6244 High Speed Peak Detector

Hassan Kelley - Field Applications Engineer
Gabino Alonso - Strategic Marketing Engineer
Aug 1st 2016
Introduction Peak detectors capture the extrema of the voltage signal at its input. A positive peak detector captures the most positive point of the input signal and a negative peak detector captures the most negative point of the input signal. Ideally the output of the peak detector circuit tracks or follows the input voltage ...

Blog Post Circuit LTspice 


Single Supply, Micropower Sample and Hold

Jan 1st 1998
Two op amp buffers, CMOS switches and a low leakage capacitor create a simple sample/hold circuit. The LT1006 has the ability to speed up response and reduce supply current through pin 8. When sampling the amplifiers are sped up to acquire signals in just 20us. When put into hold mode the supply current is throttled back to ...