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Solutions Search - RF & Wireless

Improving Linearity by Using Absorptive Filters

Clarence Mayott - Applications Engineer Mar 10th 2017
Introduction: When driving a direct sampling high speed ADC, the most likely place to degrade the performance is the interface between the final amplifier and the ADC. With any direct sampling ADC there will be nonlinear charge produced in the sampling process. This charge is reflected into the input network each time the sampling ...

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High Linearity, Low Noise LTC2387-18 Drivers for Sinusoidal Signals

Doug Stuetzle - Senior Analog Applications Engineer Jan 10th 2017
Introduction The LTC2387-18 is a high speed SAR (Successive Approximation Register) ADC suited for high linearity, low noise applications. This ADC is capable of sampling at up to 15Msps, which allows it to convert signals at frequencies of several MHz. It is well-suited to convert both pulsed and continuous signals in this ...

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Tuned IF Amplifier Applications

John Chung - Applications Engineer Oct 21st 2016
Introduction The LTC6431-20 and LTC6433-15 are single-ended RF / IF gain block amplifiers that feature very high OIP3 with low noise and a gain of 20dB and 15dB respectively. The unique combination of high linearity, low noise and low power dissipation make this an ideal candidate for many signal-chain applications. These fixed ...

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Uncompromised Clocking Solution for 16-Bit 2.5Gsps High Performance DAC

Clarence Mayott - Applications Engineer Sep 6th 2016
Design Note 555: Introduction The LTC®2000 16-bit 2.5Gsps DAC offers excellent AC performance. For many DAC applications, phase noise, noise spectral density (NSD), and spurious free dynamic range (SFDR) are critical to maximize the number of possible channels in a band without eroding the signal to noise ratio (SNR) in ...

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DC2191A Upconverts the Output of the LTC2000

Doug Stuetzle - Senior Analog Applications Engineer Jul 19th 2016
The DC2191A is a new demo board that provides an LTC5579 upconverting mixer at the output of the high speed LTC2000 DAC.  The IF output of the DAC feeds a passive lowpass reconstruction filter which then drives the IF input of the upconverting mixer.  This interface is simple and requires no DC level shifting.   An ...

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Baseband Design Example for LTC5589/LTC5599 Low-Power IQ Modulator

Bruce Hemp - Applications Section Leader Jul 1st 2016
Introduction This basic low power modulator was described in the LT Journal Nov 2015 article. In this blog post, we will show how to: Use simulation to validate the filter design, and Reduce DC offsets by utilizing Differential Amplifiers for the baseband drive. Also shown are some miscellaneous tips to help complete ...

Blog Post Circuit LTspice 

 

How to Drive the LTC2387 (Part 1): Signal Applications to 5MHz that Require Low Inter-Modulation Distortion

Derek Redmayne - Staff Scientist May 13th 2016
The biggest challenge in driving a 15Msps, 18-bit ADC with an 8Vp-p input range is the lack of integrated amplifiers with adequate bandwidth, low noise, and the required output excursion. There are low-noise, high-BW amplifiers than can produce 2VPP. There are low speed amplifiers than can produce 8VPP. For low distortion beyond ...

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Phase Noise of Integer-N and Fractional-N PLL Synthesizers

Kevin B. Scott - Senior Strategic Marketing Engineer
Michel Azarian - Product Marketing Engineer
Feb 10th 2015
Phase Noise of Integer-N and Fractional-N PLL Synthesizers Low phase noise is essential when generating high frequency, high linearity signal sources. Phase noise is a measure of the undesirable change or variation in phase of a signal. It is measured in the frequency domain and equates to jitter in the time domain. When using ...

Blog Post FracNWizard 

 

Optimization of EVM Performance in IQ Modulators

Peter Stroet - design engineer
Bruce Hemp - Applications Section Leader
May 30th 2014
Introduction EVM, or error vector magnitude, is essentially a scalar measurement of digital modulation accuracy, an important figure of merit for any source of digital modulation. This note shows how a vector signal analyzer helps optimize EVM performance of IQ modulators such as the LTC5598, a 5MHz to 1600MHz high linearity ...

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LTspice: SAR ADC Driver Interface

Kris Lokere - Strategic Applications Manager Apr 3rd 2014
  High-performance SAR ADCs can offer amazing dynamic range and linearity at faster and faster sample rates. But how do you design the amplifier and interface at the analog inputs? LTspice IV can help. This video shows how to use LTspice to simulate the analog input interface of high-performance SAR ADCs. We will look ...

Blog Post Video LTspice 

 

Digital Gain Compression (DGC) for SAR ADCs

Mar 11th 2014
The LTC2378-20 offers a digital gain compression (DGC) feature which defines the full-scale input swing to be between 10% and 90% of the ±VREF analog input range. This feature allows the SAR ADC driver to be powered off of a single positive supply since each input swings between 0.5V and 4.5V as shown in the figure below. Needing ...

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Internal Dither Improves High Speed ADC SFDR Performance

Mar 3rd 2014
Click here for a complete list of analog to digital converters with internal dither The LTC2208 is a 16-bit ADC with a very linear transfer function; however, at low input levels even slight imperfections in the transfer function will result in unwanted tones. Small errors in the transfer function are usually a result of ADC ...

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AN143 - A Simple Method to Accurately Predict PLL Reference Spur Levels Due to Leakage Current

Will Ezell - Design Engineering Section Lead
Michel Azarian - Product Marketing Engineer
Jan 3rd 2014
For More Information, Download the Complete Application Note "AN143- A Simple Method to Accurately Predict PLL Reference Spur Levels Due to Leakage Current" Presented is a simple model that can be used to accurately predict the level of reference spurs due to charge pump and/or op amp leakage current in a PLL system. Knowing ...

Blog Post PLLWizard 

 

Can You Use the Voltage Reference to Power Your ADC Driver?

Kris Lokere - Strategic Applications Manager Jul 11th 2013
Linear Technology’s family of 16-, 18-, and 20-Bit SAR ADCs (LTC2378-20 family) operates with an external reference voltage of up to 5V. The largest input voltage that you are then supposed to put on each ADC input pin is equal to that 5V reference voltage. It seems logical to use an opamp on a 5V supply with rail-to-rail ...

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Debugging the LTC6946: Getting the PLL to Lock

Michel Azarian - Product Marketing Engineer Mar 21st 2013
The DC1705 and the PLLWizard software provide a complete evaluation system for the LTC6946 that makes it easy to determine how the part will behave in your system. However, a common problem can occur when designing any PLL system - what if the PLL is not locking to the proper frequency?  In cases where the LTC6946 RF output ...

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Matched Resistor Networks for Precision Amplifier Applications

Tyler Hutchison - Signal Conditioning Design Engineer May 1st 2012
Introduction Some ideal op amp configurations assume that the feedback resistors exhibit perfect matching. In practice, resistor non-idealities can affect various circuit parameters such as common mode rejection ratio (CMRR), harmonic distortion and stability. For instance, as shown in Figure 1, a single-ended amplifier configured ...

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Low Phase Noise Frequency Synthesizers for RF Applications

Doug LaPorte - Design Manager Sep 19th 2011
In modern RF communication systems, signal integrity is of prime importance. To meet the system requirements, amplifiers, mixers and modulators must have a low noise figure and low distortion products. Additionally, as system designers work to squeeze increasingly more data into the available bandwidth, low phase noise signal ...

Blog Post Video