Solutions Search - LTC3413 - 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination

Altera Nios II Embedded Evaluation Kit, Cyclone III Edition

Jun 11th 2014
The Nios II Embedded Evaluation Kit, Cyclone III Edition makes evaluating Altera’s embedded solutions easier than ever. A dozen different processor systems targeting the low cost, low-power Cyclone III FPGA can be evaluated by simply using the LCD color touch panel to scroll through and load your demo of ...

Altera Cyclone III FPGA Starter Kit

Jun 10th 2014
The Cyclone III FPGA Starter Kit is easy to use and an ideal introduction for users who have never designed with FPGAs before. Experienced FPGA designers can build systems leveraging the design examples included in the kit for a quick “out-of-the-box” evaluation experience.   Linear Technology ...

DDR Memory Power Supply: 3.3Vin, 1.5V@+/-3A Vtt (2.5V external reference)

Nov 13th 2002
The LTC3413 is a high efficiency monolithic synchronous step-down DC/DC converter utilizing a constant frequency, current mode architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage equal to (0.5)VREF while sourcing or sinking up to 3A of output current. An internal voltage ...

DDR Memory Power Supply: 3.3Vin, 0.9V@+/-3A Vtt (with 1.8V external reference)

Nov 13th 2002
Many DDR termination applications require the bus termination voltage to be stepped down from a higher system voltage while tracking one-half of a reference voltage. This option is allowable in most systems since a reference voltage is typically available. This circuit shows a solution for a 3.3V to 0.9V, ±3A termination ...