Solutions Search - LTC2389-18 - 18-Bit, 2.5Msps SAR ADC with Pin-Configurable Analog Input Range and 99.8dB SNR

A Low Jitter Clock is Required to Evaluate High Resolution ADCs

Guy Hoover - Applications Engineer Mar 3rd 2014
“How bad can the ADC clock be and still get good SNR results?” I’ve never been asked this question directly by a customer but I do periodically get asked about using clock sources that are not appropriate for high resolution ADCs. Usually it involves a function generator which can have jitter up to 1nsRMS. ...

ADC Driving: Driving Differential ADCs

Guy Hoover - Applications Engineer Sep 10th 2013
For most fully differential applications, it is recommended that the LTC2389-18 be driven using the LT6201 ADC driver configured as two unity-gain buffers, as shown in Figure 1. The LT6201 combines fast settling and good DC linearity with a 0.95nV/√Hz input-referred noise density, enabling it to achieve the full ADC data ...