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Extending the Resolution of the LTC2758

Noe Quintero - Application Engineer Mar 21st 2017

Introduction

One of my favorite DACs is the LTC2758. It has excellent temperature stability and, when paired with a stable reference such as the LM399 or the LTZ1000, is an excellent choice for instrumentation applications. In this post I will present two methods for increasing the resolution of the LTC2758.

The Search for the Holy Grail, I Mean DAC...

First, I would like to point out that this design has some limitations. In order to extend the resolution of the LTC2758, we have rely on the assumption that the LTC2758 datasheet is very conservative. Figure 1 shows the INL and DNL of a typical part. The DNL of the LTC2758 is very good and will ensure it will be monotonic in the 20-bit region. Notice that the part almost makes 0.25 LSB INL. This suggests that this part is almost in the 20-bit domain. Simply put, we need a DAC with lower than 0.25 LSB INL to truly be 20-bit linear.

Figure 1. Typical INL and DNL of the LTC2758Figure 1. Typical INL and DNL of the LTC2758

To find this better than 0.25 LSB INL LTC2758, we would have to bin them. In my case, I grabbed five LTC2758s from box stock and tested the INL. I have to admit, I got some raised eyebrows when my colleagues discovered my optimistic plans. To my delight, the results were better than I expected. I was able to find two LTC2758s that had better than 0.25 LSB INL. The other three were close, Figure 2 shows how close they were.

Figure 2. Very Close INL to be 20-Bits CapableFigure 2. Very Close INL to be 20-Bits Capable

Going the Extra Bits

Having a DAC with better than 0.25 LSB allows the possibility to get 20 bits. The next step is being able to provide the extra bits. My first intuition was to use one DAC channel to drive the VOSADJ of the other channel to increase the resolution. The idea is to take advantage that the VOSADJ has a built-in attenuator to divide the subranging channel LSB. Depending on the SPAN range, VOSADJ will attenuate by a factor of 32, 64, or 128. Figure 3 shows the diagram of this approach.

We can see that even at the lowest attenuation factor, we can get an extra 5-bits of resolution. Unfortunately, we are limited by the MSB (most significant bit) DAC's INL and cannot realize the extra bits monotonically by the DNL. The best we can get is 20 bits.

Figure 3. Diagram of 20-bit DACFigure 3. Diagram of 20-bit DAC

To use this amazingly peculiar DAC, we have to consider which channel will be the MSB channel and which is going to be the subrange channel. To start off, let’s assume we are using the largest SPAN range and channel A will be the MSB channel. The VOSADJ will attenuate by a factor of 32 and we will get a sub range of 5-bits. The two LSBs of the 20-bit word will need to be placed in D4 and D3 of the subrange channel word as shown in Figure 4. The rest of the bits will be nulled for the channel B word. Table 1 shows the mapping of the SPAN ranges for the lower two bits of the 20-bit word.

Figure 4. How to write the 20-bit word to the LTC2758Figure 4. How to write the 20-bit word to the LTC2758

Table 1. 20-bit LSBs on LSB Channel

This approach worked really well and after a well deserved celebration, I proudly showcased my contraption to the lab. Figure 5 shows the hardware. I got really great feedback and discovered another method to extend the DAC’s resolution with fewer components.

Figure 5. Hardware with My Favorite Reference LM399Figure 5. Hardware with My Favorite Reference LM399

Using Less To Get More

Chad Steward, our Mixed Signal Design Manager, came up with an alternative method in getting extra bits out of the subrange channel. He suggested attenuating the subranging channel’s reference and connecting that channel to the summing junction of the MSB channel. Figure 6a shows the diagram and Figure 6b shows the physical hardware.

Figure 6a. Getting 20 Bits with Less Hardware. Figure 6b. Hardware ModFigure 6a. Getting 20 Bits with Less Hardware. Figure 6b. Hardware Mod

It took me a bit of staring to truly understand the circuit. Figure 7 show a simplified diagram of the effect of Chad’s approach.

Figure 7: Simplified DiagramFigure 7: Simplified Diagram

Each DAC can be represented as two variable resistors that steer the current. They are tracking and will always produce a parallel resistance of 10KΩ.

None

Similarly to the first approach, the 20-bit word is divided between the two channels. The upper bits of the 20-bit word is used on channel A and the bottom two bits are used for channel B. Figure 8 shows the locations. As before, bits are not used in the 20-bit word are set to zero.

Figure 4. How to write the 20-bit word to the LTC2758Figure 4. How to write the 20-bit word to the LTC2758 for the 20-bit DAC in Figure 6.

Results

Figure 8. INL graph of the 20-bit DAC in Figure 6. Measured with the HP3458A.Figure 8. INL graph of the 20-bit DAC in Figure 6. Measured with the HP3458A.

Conclusion

It took a leap of faith to extend the resolution of the DAC with these two methods. We cannot guarantee linearity over temperature, and we are relying on the fact that the LTC2758 can perform better than the datasheet with selected parts. That being said, this is a valuable circuit when used in a lab and in most cases will work at room temperature due to Linear Technology's conservative nature. To extend this idea further, a customer could do a calibration in order to characterize the transfer function and use the subranging channel to “tweak” the MSB channel, but that’s a topic for another blog. Lastly, I would like to thank Josh Guerrero for measuring the performance of the DAC.