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Altera Arria 10 FPGA Development Kit

The LTC3877 + LTC3874 are used to provide power for the Core Rail by taking advantage of the 6-bit parallel VID that interfaces with the 20-nm Arria 10’s SmartVID to reduce the FPGA’s static and dynamic power consumption, and Ultralow value and temperature compensated DCR load current sensing which maximizes the efficiency and load current sharing precision.


Note: For Schematics and Bill-of-Materials please click here to send email.

Arria 10 (Rev E3- Linear Technology) Dev KitAltera Arria 10 Dev Kit


Arria 10 FPGA Development Kit (Power Tree Representative of Actual Components Used on Board)
Altera Arria 10 FPGA Development Kit (Power Tree Representative of Actual Components Used on the above Board)

 

Rail / Function  Part Number(s)  Description
FPGA Core LTC3877 + LTC3874 105A @ 0.9V regulator interfaces with Arria 10 SmartVID
High speed transceivers LTM4637 20A µModule regulator
Power UP/DOWN sequencing, power monitoring, voltage margining and fault management LTC2977 8-channel PMBus power system manager
PowerPath™ management LTC4357 High voltage ideal diode controller
3.3V intermediate bus from 12VIN LTM4620 Dual 13A or single 26A µModule regulator
Input overvoltage protection LTC4365 Overvoltage, undervoltage and reverse supply protection controller
Housekeeping system power and power management LT1965, LT3082, LTC4352, LTC3025-1LTC2418 Low noise linear regulators, 24-bit ADC; low voltage ideal diode



Simplied Power Tree that directly steps down 12V to required I/O voltage
Simplied Power Tree that directly steps down 12V to required I/O voltage

 

Arria 10 (Rev E3- Linear Technology) Dev Kit Block DiagramArria 10 (Rev E3- Linear Technology) Dev Kit Block Diagram