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Altera 100G Development Kit, Stratix V Edition

The Altera 100G Development Kit, Stratix V GX Edition enables a thoroughevaluation of 100G designs. It supports 10G/40G and 100G line interfaces through optical modules and the ability to verify a variety of high-speed protocols.

DK-100G-5SGXEA7N Dev KitDK-100G-5SGXEA7N Dev Kit

DK-100G-5SGXEA7N Power TreeDK-100G-5SGXEA7N Power Tree

Rail / Function  Part Number General Description of Part
0.9V: VCC (FPGA Core) LTM4627
15A DC/DC μModule Regulator
5V, 3.3V, 2.5V, 1.5V: System Power LTM4601
12A μModule Regulators with PLL, Output Tracking and Margining
5V: System Power LTM4600
10A High Efficiency DC/DC μModule
2.5V: VCCA_PLL, AUX
1.0V: VCCT_GXB
1.1V: Ethernet PHY
1.5V: VCCH_GXB, VCCPT, VCCD_PLL
1.2V: CFP Translators
LTC3026 1.5A Low Input Voltage VLDO Linear Regulator
1.0V: VCCR_GXB LT3070 5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator
12V: System Power LT1374
4.5A, 500kHz Step-Down Switching Regulator
Clock for uModule Regulators LTC6900
Low Power, 1kHz to 20MHz Resistor Set SOT-23 Oscillator
Housekeeping system power and power management LT1761LTC4357 Low Noise LDO, Ideal Diode

 

DK-100G-5SGXEA7N Block DiagramDK-100G-5SGXEA7N Block Diagram