1. Skip to navigation
  2. Skip to content
  3. Skip to sidebar

DC1726A - LTC3618EUF Demo Board | For DDR Termination, 2.25V ≤ VIN ≤ 5.5V, VDDQ = 1.5V/1.8V/2.5V @ ±3A, VTT = 0.5VDDQ @ ±3A, VTTR Current = ±10mA

Demonstration circuit 1726 is a dual high efficiency monolithic step-down (buck) DC/DC switching regulator designed for double-data-rate (DDR) memory termination in computer systems. The VDDQ output is capable of sourcing and sinking up to 3A with output voltages of 1.5V, 1.8V, 2.5V plus an optional voltage, selected using jumpers. The VTT output can also source and sink up to 3A with an output voltage equal to half of the VDDQ voltage, half of the input voltage or half of an externally applied voltage, selected using a jumper. An additional low current output (VTTR) equal to the VTT voltage capable of sourcing and sinking up to 10mA is included. Input voltage range is from 2.25V to 5.5V with overvoltage protection for transients exceeding 6.5V.

DC1726A - Schematic




LTspice® software is a powerful, fast and free simulation tool, schematic capture and waveform viewer with enhancements and models for improving the simulation of switching regulators. Click here to download LTspice

To launch a ready to run LTspice demonstration circuit for this part:

To explore other ready to run LTspice demonstration circuits, please visit our Demo Circuits Collection.