LTC2158-12 - Dual 12-Bit 310Msps ADC
- 67.6dBFS SNR
- 88dB SFDR
- Low Power: 688mW Total
- Single 1.8V Supply
- DDR LVDS Outputs
- 1.32VP-P Input Range
- 1.25GHz Full Power Bandwidth S/H
- Optional Clock Duty Cycle Stabilizer
- Low Power Sleep and Nap Modes
- Serial SPI Port for Configuration
- Pin-Compatible 14-Bit Versions
- 64-Lead (9mm × 9mm) QFN Package
The LTC®2158-12 is a 2-channel simultaneous sampling 310Msps 12-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 67.6dB SNR and 88dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to undersample high frequencies with good performance. The latency is only five clock cycles.
DC specs include ±0.6LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.6LSBRMS.
The digital outputs are double data rate (DDR) LVDS.
The ENC+ and ENC– inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
PackagingFor complete and up to date package information and drawings, please refer to our packaging page
- Part numbers ending in PBF are lead free. Please contact LTC marketing for information on lead based finish parts.
- Part numbers containing TR or TRM are shipped in tape and reel or 500 unit mini tape and reel, respectively
- Please refer to our general ordering information or the product datasheet for more details
Package Variations and Pricing
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- Cellular Basestations
- Software Defined Radios
- Medical Imaging
- High Definition Video
- Testing and Measurement Instruments
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