Search Results
| Document Type |
Title |
Date ▴ |
| Application Note |
AN161 - LTC6951 Synchronization Manual Design Examples for EZSync, ParallelSync, EZParallelSync and EZ204Sync |
Mar 15th, 2017 |
| Software and Simulation |
LTC6951 - IBIS Model |
Mar 6th, 2017 |
| LT Journal |
Multi-Output Clock Synthesizer with Integrated VCO Features the Low Jitter Required to Drive Modern High Speed ADC and DAC Clock Inputs |
Apr 14th, 2016 |
| Press Release |
Ultralow Jitter 2MHz to 2700MHz Clock Synthesizer with Distribution Features Multichip Synchronization & JESD204B Clocking |
Mar 22nd, 2016 |
| Product Selector Card |
Ultralow Jitter Clock Generators and Distributors Maximize Data Converter SNR |
Mar 4th, 2016 |
| Datasheet |
LTC6951 - Ultralow Jitter Multi-Output Clock Synthesizer with Integrated VCO |
Feb 25th, 2016 |
| Press Release |
Ultralow Jitter Clock Distribution Solution Combines EZSync Multichip Synchronization |
Nov 23rd, 2015 |
| Software and Simulation |
ltc6954_4.ibs: LTC6954-4 IBIS Model |
Nov 10th, 2015 |
| Software and Simulation |
ltc6954_3.ibs: LTC6954-3 IBIS Model |
Nov 10th, 2015 |
| Software and Simulation |
ltc6954_2.ibs: LTC6954-2 IBIS Model |
Nov 10th, 2015 |
| Software and Simulation |
ltc6954_1.ibs: LTC6954-1 IBIS Model |
Nov 10th, 2015 |
| Product Selector Card |
Less than 20fsRMS Additive Jitter Clock Distribution Solution with EZSync |
Nov 9th, 2015 |
| Datasheet |
LTC6954 - Low Phase Noise, Triple Output Clock Distribution Divider/Driver |
Nov 9th, 2015 |
| Ad |
1.4GHz Clean Clocking Solution |
Feb 6th, 2015 |
| LT Journal |
1.4GHz Low Jitter PLL with Clock Distribution Solves Difficult Clocking Problems: Multi-Clock Synchronization and Data Converter Clocking |
Jan 22nd, 2015 |
| Press Release |
Five Output Ultralow Jitter Clock Distributor with PLL Provides Unique Multichip Output Synchronization Method |
Jan 20th, 2015 |
| Software and Simulation |
LTC6950 IBIS Model |
Jan 6th, 2015 |
| Product Selector Card |
Ultralow Jitter Clock Generation and Distribution |
Jan 5th, 2015 |
| Datasheet |
LTC6950 - 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution |
Dec 29th, 2014 |
| Software and Simulation |
LTC6957-3/LTC6957-4 IBIS Model |
Dec 4th, 2014 |
| Software and Simulation |
LTC6957-2 IBIS Model |
Dec 4th, 2014 |
| Software and Simulation |
LTC6957-1 IBIS Model |
Dec 4th, 2014 |
| LT Journal |
Reference Clock Distribution for a 325MHz IF Sampling System with over 30MHz Bandwidth, 64dB SNR and 80dB SFDR |
Jul 9th, 2013 |
| Design Note |
DN514 - A Robust 10MHz Reference Clock Input Protection Circuit and Distributor for RF Systems |
Apr 9th, 2013 |
| Press Release |
Dual Output Sine Wave to Logic Converter Utilizes Selectable Input Filtering for Lowest Additive Jitter |
Apr 8th, 2013 |
| Product Selector Card |
LTC6957 - Low Phase Noise Reference Buffer/Logic Converter |
Mar 21st, 2013 |
| Datasheet |
LTC6957-1/LTC6957-2/ LTC6957-3/LTC6957-4 - Low Phase Noise, Dual Output Buffer/Driver/ Logic Converter |
Mar 20th, 2013 |
| Reliability Data |
R565 - Reliability Data |
Nov 27th, 2012 |